Verilog HDL : A Guide to Digital Design and Synthesis (Record no. 40248)
| 000 -LEADER | |
|---|---|
| fixed length control field | 00394nam a22001337a 4500 |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.392 |
| 100 ## - MAIN ENTRY--AUTHOR NAME | |
| Personal name | Palnitkar, Samir |
| 245 ## - TITLE STATEMENT | |
| Title | Verilog HDL : A Guide to Digital Design and Synthesis |
| Statement of responsibility | Samir Palnitkar |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Place of publication | India |
| Name of publisher | Pearson |
| Year of publication | 2013 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | 490 Pages |
| Other physical details | 23x16 cm |
| -- | PB |
| Accompanying material | CD |
| 505 ## - FORMATTED CONTENTS NOTE | |
| Formatted contents note | Include Index |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Verilog (Computer Hardware Description Language) |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | Books |
| Withdrawn status | Lost status | Permanent Location | Current Location | Shelving location | Date acquired | Source of acquisition | Cost, normal purchase price | Full call number | Accession Number | Koha item type |
|---|---|---|---|---|---|---|---|---|---|---|
| Garrison Public Library Multan | Garrison Public Library Multan | General Stacks | 2017-06-09 | CRV/GPLM/22/2017 | 570.70 | 621.392 P153V 2013 | 45005 | Books |